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| CD4050BMS December 1992 File Number 3193 CMOS Hex Buffer/Converter The CD4050BMS is an non-inverting hex buffer and features logic level conversion using only one supply voltage (VCC). The input signal high level (VIH) can exceed the VCC supply voltage when this device is used for logic level conversions. This device is intended for use as CMOS to DTL/TTL converters and can drive directly two DTL/TTL loads. (VCC = 5V, VOL 0.4V, and IOL 3.3mA. The CD4050BMS is designated as replacement for CD4010B. Because the CD4050BMS requires only one power supply, it is preferred over the CD4010B and should be used in place of the CD4010B in all inverter, current driver, or logic level conversion applications. In these applications the CD4050BMS is pin compatible with the CD4010B, and can be substituted for this device in existing as well as in new designs. Terminal No. 16 is not connected internally on the CD4050BMS, therefore, connection to this terminal is of no consequence to circuit operation. For applications not requiring high sink current or voltage conversion, the CD4069UB Hex Inverter is recommended. The CD4050BMS is supplied in these 16 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4T H1E H3X Features * High Voltage Type (20V Rating) * Non-Inverting Type * High Sink Current for Driving 2 TTL Loads * High-to-Low Level Logic Conversion * 100% Tested for Quiescent Current at 20V * Maximum Input Current of 1A at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC * 5V, 10V and 15V Parametric Ratings Applications * CMOS to DTL/TTL Hex Converter * CMOS Current "Sink" or "Source" Driver * CMOS High-to-Low Logic Level Converter Pinout CD4050BMS TOP VIEW VCC G=A A H=B B I=C C VSS 1 2 3 4 5 6 7 8 16 NC 15 L = F 14 F 13 NC 12 K = E 11 E 10 J = D 9D Functional Diagram A 3 2 G=A Schematic Diagram VCC B 5 4 H=B P P OUT N J=D N C 7 6 I=C R IN D VCC VSS NC = 13 NC = 16 1 8 E 9 10 11 12 K=E VSS F 14 15 FIGURE 1. SCHEMATIC DIAGRAM, 1 OF 6 IDENTICAL UNITS L=F 4-1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 CD4050BMS Absolute Maximum Ratings DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to VDD +0.5V DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . . . .10mA Operating Temperature Range . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 1/32 Inch (1.59mm 0.79mm) from case for 10s Maximum Reliability Information Thermal Resistance. . . . . . . . . . . . . . . . ja jc Ceramic DIP and FRIT Package . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W Maximum Package Power Dissipation (PD) at +125oC For TA = -55oC to +100oC (Package Type D, F, K) . . . . . .500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor. . . . . . . . . . . . . . . .100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL4 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 4.5V, VOUT = 0.4V VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10A VSS = 0V, IDD = 10A VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC +125oC -55oC +25oC +125oC -55oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 3.5 11 1.5 4 V V V V MIN -100 -1000 -100 14.95 2.6 3.2 8.0 24 -2.8 0.7 MAX 2 200 2 100 1000 100 50 -0.8 -3.2 -1.8 -6.0 -0.7 2.8 UNITS A A A nA nA nA nA nA nA mV V mA mA mA mA mA mA mA mA V V V PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND VOH > VOL < VDD/2 VDD/2 NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs. 3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max. 4-2 CD4050BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 9 10, 11 Propagation Delay TPLH VDD = 5V, VIN = VDD or GND 9 10, 11 Transition Time TTHL VDD = 5V, VIN = VDD or GND 9 10, 11 Transition Time TTLH VDD = 5V, VIN = VDD or GND 9 10, 11 NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES 1, 2 TEMPERATURE -55oC, +25oC +125oC VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) VOL VOL VOH VOH IOL4 VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, No Load VDD = 10V, No Load VDD = 4.5V, VOUT = 0.4V 1, 2 1, 2 1, 2 1, 2 1, 2 +25oC, +125oC, 55oC +25oC, +125oC, 55oC +25oC, +125oC, 55oC +25oC, +125oC, 55oC +125oC -55oC Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC -55oC Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC -55oC Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC -55oC Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC -55oC Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC -55oC Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC -55oC Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC -55oC MIN 4.95 9.95 1.8 3.3 2.4 4.0 5.6 10 18 26 MAX 1 30 2 60 2 120 50 50 -0.48 -0.81 -1.55 -2.6 -1.18 -2.0 -3.1 -5.2 UNITS A A A A A A mV mV V V mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN MAX 110 149 140 189 60 81 160 216 UNITS ns ns ns ns ns ns ns ns PARAMETER Propagation Delay SYMBOL TPHL CONDITIONS (NOTE 1, 2) VDD = 5V, VIN = VDD or GND 4-3 CD4050BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Input Voltage Low Input Voltage High Propagation Delay SYMBOL VIL VIH TPHL CONDITIONS VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V, VOH > 9V, VOL < 1V VIN = 10V, VDD = 5V VIN = 10V, VDD = 10V Propagation Delay TPLH VIN = 10V, VDD = 5V VIN = 10V, VDD = 10V Propagation Delay TPHL VIN = 15V, VDD = 5V VIN = 15V, VDD = 15V Propagation Delay TPLH VIN = 15V, VDD = 5V VIN = 15V, VDD = 15V Transition Time TTHL VDD = 10V, VIN = VDD OR GND VDD = 15V, VIN = VDD OR GND Transition Time TTLH VDD = 10V, VIN = VDD OR GND VDD = 15V, VIN = VDD OR GND Input Capacitance NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL IDD VNTH VTN VTP VTP F CONDITIONS VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10A VDD = 10V, ISS = -10A VSS = 0V, IDD = 10A VSS = 0V, IDD = 10A VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 1, 2, 3, 4 +25oC NOTES 1, 4 1, 4 1, 4 1, 4 1, 4 1 TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC MIN -2.8 0.2 VOH > VDD/2 MAX 7.5 -0.2 1 2.8 1 VOL < VDD/2 1.35 x +25oC Limit UNITS A V V V V V CIN Any Input NOTES 1, 2 1, 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2 TEMPERATURE +25oC, +125oC, 55oC +25oC, +125oC, 55oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC MIN +7 MAX 3 100 55 90 80 100 30 80 60 40 30 80 60 7.5 UNITS V V ns ns ns ns ns ns ns ns ns ns ns ns pF ns NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 3. See Table 2 for +25oC limit. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER Supply Current - MSI-1 Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A 0.2A 20% x Pre-Test Reading 20% x Pre-Test Reading DELTA LIMIT 4-4 CD4050BMS TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Group D Subgroup B-5 Subgroup B-6 MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 Subgroups 1, 2, 3, 9, 10, 11 IDD, IOL5, IOH5A READ AND RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A IDD, IOL5, IOH5A NOTE: 1. 5% Parametric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9 POST-IRRAD Table 4 CONFORMANCE GROUPS Group E Subgroup 2 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 (Note 1) Static Burn-In 2 (Note 1) Dynamic Burn-In (Note 3) Irradiation (Note 2) NOTES: 1. Each pin except pin 1, pin 16, and GND will have a series resistor of 10K 5%, VDD = 18V 0.5V 2. Each pin except pin 1, pin 16, and GND will have a series resistor of 47K 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V 0.5V 3. Each pin except pin 1, pin 16, and GND will have a series resistor of 4.75K 5%, VDD = 10V 0.5V OPEN 2, 4, 6, 10, 12, 13, 15 2, 4, 6, 10, 12, 13, 15 13 2, 4, 6, 10, 12, 13, 15, 16 GROUND 3, 5, 7-9, 11-14 8 8 8 VDD 1, 16 1, 3, 5, 7, 9, 11, 14, 16 1, 16 1, 3, 5, 7, 9, 11, 14 2, 4, 6, 10, 12, 15 3, 5, 7, 9, 11, 14 9V -0.5V 50kHz 25kHz Typical Performance Characteristics OUTPUT LOW (SINK) CURRENT (IOL) (mA) AMBIENT TEMPERATURE (TA) = +25oC SUPPLY VOLTAGE (VCC) = 5V OUTPUT VOLTAGE (VO) (V) AMBIENT TEMPERATURE (TA) = +25oC 70 15V 60 50 40 30 GATE-TO-SOURCE VOLTAGE (VGS) = 5V 20 10 10V 5 4 MINIMUM 3 MAXIMUM 2 1 0 1 2 3 4 0 1 INPUT VOLTAGE (VI) (V) 2 3 4 5 6 7 8 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 2. MINIMUM AND MAXIMUM VOLTAGE TRANSFER CHARACTERISTICS FIGURE 3. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS 4-5 CD4050BMS Typical Performance Characteristics OUTPUT LOW (SINK) CURRENT (IOL) (mA) AMBIENT TEMPERATURE (TA) = +25oC 70 15V 60 50 40 30 20 GATE-TO-SOURCE VOLTAGE (VGS) = 5V 10 -10V -30 -35 -15V GATE-TO-SOURCE VOLTAGE (VGS) = 5V 10V (Continued) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -7 -6 -5 -4 -3 -2 -1 -8 0 OUTPUT HIGH (SINK) CURRENT (IOH) (mA) 108 AMBIENT TEMPERATURE (TA) = +25oC -5 -10 -15 -20 -25 0 1 2 3 4 5 6 7 8 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 4. MINIMUM OUTPUT LOW (SINK) CURRENT DRAIN CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -7 -6 -5 -4 -3 -2 -1 FIGURE 5. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS SUPPLY VOLTAGE (VCC) = 10V -8 0 OUTPUT HIGH (SINK) CURRENT (IOH) (mA) 10 OUTPUT VOLTAGE (VO) (V) 9 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 9 10 INPUT VOLTAGE (VI) (V) +125oC VCC = 5V -55oC AMBIENT TEMP (TA) = -55oC +125oC AMBIENT TEMPERATURE (TA) = +25oC -5 GATE-TO-SOURCE VOLTAGE (VGS) = 5V -10 -10V -15 -20 -25 -30 -35 -15V FIGURE 6. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS POWER DISSIPATION PER INVERTER (W) 105 8 6 4 2 FIGURE 7. TYPICAL VOLTAGE TRANSFER CHARACTERISTICS AS A FUNCTION OF TEMPERATURE POWER DISSIPATION PER INVERTER (PD) (W) 106 AMBIENT TEMPERATURE (T ) = +25oC A 105 104 103 102 10 1 10 15V; 1MHz 15V; 100KHz 10V; 100KHz 15V; 10KHz 10V; 10KHz 15V; 1KHz SUPPLY VOLTAGE (VCC) = 5V FREQUENCY (f) = 10KHz 103 104 105 106 107 102 INPUT RISE AND FALL TIME (tr, tf) (ns) AMBIENT TEMPERATURE (TA) = +25oC 104 8 6 4 SUPPLY VOLTAGE (VDD) = 15V 103 2 8 6 4 2 10V 10V 5V 102 8 6 4 2 LOAD CAPACITANCE (CL) = 50pF (11pF FIXTURE + 39pF EXT) CL = 15pF (11pF FIXTURE + 4pF EXT 2 468 2 4 68 2 4 68 2 4 68 10 10 102 103 104 105 INPUT FREQUENCY (f) (kHz) FIGURE 8. TYPICAL POWER DISSIPATION vs FREQUENCY CHARACTERISTICS FIGURE 9. TYPICAL POWER DISSIPATION vs INPUT RISE AND FALL TIMES PER INVERTER 4-6 CD4050BMS Chip Dimensions and Pad Layout Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch). METALLIZATION: Thickness: 11kA - 14kA, PASSIVATION: 10.4kA - 15.6kA, Silane AL. BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 4-7 |
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